[][src]Struct cortex_m::peripheral::DCB

pub struct DCB { /* fields omitted */ }

Debug Control Block

Methods

impl DCB
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Enables TRACE. This is for example required by the peripheral::DWT cycle counter to work properly. As by STM documentation, this flag is not reset on soft-reset, only on power reset.

Disables TRACE. See DCB::enable_trace() for more details

Is there a debugger attached? (see note)

Note: This function is reported not to work on Cortex-M0 devices. Per the ARM v6-M Architecture Reference Manual, "Access to the DHCSR from software running on the processor is IMPLEMENTATION DEFINED". Indeed, from the Cortex-M0+ r0p1 Technical Reference Manual, "Note Software cannot access the debug registers."

impl DCB
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Returns a pointer to the register block

Trait Implementations

impl Deref for DCB
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The resulting type after dereferencing.

impl Send for DCB
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Auto Trait Implementations

impl !Sync for DCB

Blanket Implementations

impl<T, U> TryFrom for T where
    T: From<U>, 
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🔬 This is a nightly-only experimental API. (try_from)

The type returned in the event of a conversion error.

impl<T> From for T
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impl<T, U> TryInto for T where
    U: TryFrom<T>, 
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🔬 This is a nightly-only experimental API. (try_from)

The type returned in the event of a conversion error.

impl<T, U> Into for T where
    U: From<T>, 
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impl<T> Borrow for T where
    T: ?Sized
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impl<T> BorrowMut for T where
    T: ?Sized
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impl<T> Any for T where
    T: 'static + ?Sized
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impl<T> Same for T
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Should always be Self